Why Stacking Chips Like Pancakes Could Mean a Massive Advance in Laptops

Intel hopes to bring the premium speeds found in the Apple M1 Ultra to the masses by combining “chiplets” into a single, larger uberprocessor.

For decades, the size and density of a computer chip’s electronic circuitry served as a litmus test. Intel now believes that another dimension is equally important: how skillfully a group of such chips can be packaged into a single, more powerful processor.

Intel CEO Pat Gelsinger will highlight the company’s packaging prowess at the Hot Chips conference on Monday. It’s an important component of two new processors: Meteor Lake, a next-generation Core processor family member that will power PCs in 2023, and Ponte Vecchio, the brains of Aurora, the world’s fastest supercomputer.

Advanced packaging, which allows chip designers to combine multiple “chiplets” into a single larger processor, will be critical in making future PCs faster and more capable. The technology is used by AMD to build its top-tier PC processor, the Ryzen 7 5800X3D, and by Apple to integrate two M1 Max chips into the M1 Ultra, the company’s most powerful Mac processor.

However, that Ryzen chip costs $440, and the M1 Ultra costs $2,000 more than an M1 Max Mac Studio. Meteor Lake introduces packaging to the mainstream PC market, where consumers purchase hundreds of millions of machines each year, even in bad years. The advancement will result in faster, more powerful computers at a lower cost.

“Meteor Lake will be a huge technical innovation,” according to Real World Tech analyst David Kanter, because of how it packages.

Staying on the cutting edge of chip progress meant miniaturising chip circuitry for decades. Photolithography is a process used by chipmakers to etch tiny on-off switches called transistors onto silicon wafers using light patterns. The smaller the transistors, the more designers can add for new features such as graphics accelerators or artificial intelligence tasks.

Intel now believes that combining these chiplets into a package will provide the same processing power boost as traditional photolithography.

“We’ve reached the point where packaging is as important as the process technology itself,” said Boyd Phelps, director of Intel’s Design Engineering Group, in an interview.

Intel is concerned with packaging technology. It is battling to reclaim chipmaking leadership from Taiwan Semiconductor Manufacturing Co. (TSMC), which manufactures Apple chips, and Samsung. Despite spending tens of billions of dollars on new chipmaking capacity, Intel’s most recent quarterly financial results were “disastrous,” according to TechInsights analyst Linley Gwennap. The US government’s $52.7 billion chipmaking subsidy will not help until 2023.

Packaging could assist Intel in regaining some of its former lead.

Intel co-founder Gordon Moore’s 1965 prophecy comes true
Gordon Moore, co-founder of Intel, predicted a “day of reckoning” when it would no longer make sense to make chips from a single large slice of silicon. “It may prove to be more economical to build large systems out of smaller functions, which are separately packaged and interconnected,” he wrote in his seminal paper laying out Moore’s Law.

Intel has two primary packaging strategies.

The first is EMIB (Embedded Multi-die Interconnect Bridge), which uses a small connecting patch beneath to connect two “chiplets” side by side. This is found in the Ponte Vecchio and higher-end models of the company’s upcoming Sapphire Rapids server processor.

The second is Intel’s Foveros, which connects multiple chiplets vertically, similar to stacking one pancake on top of another. The Meteor Lake chip is made with Foveros, with four chiplets perched on another silicon substrate beneath it that serves as a communication link.

Foveros is also important for Meteor Lake’s successor, Arrow Lake, which will benefit from upgraded circuitry for its CPU and GPU cores. Following that is Lunar Lake, which is designed for laptops with very low power consumption and includes an updated chiplet recipe. Phelps expects Arrow Lake and Lunar Lake to be “ready in 2024.”

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Under new CEO EMIB, Intel will manufacture chips for others. Foveros and EMIB both help to extend Moore’s Law’s trend of increasing transistor counts. For example, the Ponte Vecchio supercomputer chip contains over 100 billion transistors.

Advantages of advanced packaging
The ability of a chip designer to mix and match processor components is a significant advantage of packaging chiplets. The most performance-sensitive chiplets can be built using the most recent generation manufacturing process, which is a premium option, but less critical parts can be built using older, less expensive processes and chiplets that have already proven themselves.

Designers will be able to “focus on more innovative engineering and less turning the crank on basic stuff,” according to Kanter.

Chiplets also help Intel’s manufacturing issues. TSMC manufactures three of Meteor Lake’s four data-processing chiplets. Intel created all of the components but will only manufacture the chiplet with the CPU cores.

Chiplets can also help chip designers adopt new manufacturing technologies more quickly. Rather than waiting for engineers to update every type of transistor for a more advanced photolithography process, chipmakers can use the new process only for the most performance-critical chip tasks.

Because advanced packaging increases cost, complexity, and new manufacturing steps, it is not always the best option. It also does not address issues such as those that delayed Intel’s Sapphire Rapids and Ponte Vecchio. However, it will become increasingly important to chips in nearly every PC on the market.